4.7.3.5 - Machine-code and assembly operations (Java)

Loads, stores and arithmetic

An assembly instruction names a small operation that changes processor state, such as loading a value into a register or storing it in memory.

Machine code is the binary instruction representation executed by the processor. Assembly language expresses instructions using mnemonics and operands. An assembler translates the assembly source into machine code for a particular instruction set. The same mnemonic can have different syntax or details on different processors; an exam supplies the model you must apply.

Our teaching model has an unsigned 8-bit accumulator ACC, byte-addressed memory M, and a program counter PC containing the label/address of the next instruction. Initially ACC = 0 unless stated otherwise. Values range from 0 to 255. Arithmetic keeps the low eight bits, wrapping modulo 256. After an ordinary instruction, execution proceeds to the next line; a branch replaces that next instruction. HALT stops execution. Labels identify instructions and are not operations.

An operand #n is an immediate value: use the number n itself. A named memory location such as VALUE is direct addressing: use M[VALUE], the contents of that address. STORE has a direct destination. These are the only addressing modes needed here.

If M[VALUE] = 7, LOAD #VALUE would not be valid in this numeric-immediate convention: a symbolic address is not the value 7. LOAD VALUE loads 7; LOAD #7 also loads 7 but obtains it from the instruction rather than memory.

With M[VALUE] = 7, trace this supplied assembly:

LOAD VALUE
ADD #5
STORE TOTAL
SUB #2
HALT

ACC becomes 7, then 12; STORE sets M[TOTAL] = 12 while leaving ACC = 12; SUB leaves ACC = 10. Halt does not store 10 automatically. A load copies the value: it does not remove it from memory.

The equivalent state updates can be illustrated in Java without turning Java into the assembly language:

int value = 7;
int acc = value;
acc = (acc + 5) & 255;
int total = acc;
acc = (acc - 2) & 255;

The & 255 keeps only eight bits. This is the stated teaching machine's arithmetic rule, not a claim that every real processor uses identical overflow behavior.

Comparisons, branches and loops

A comparison records a relationship between values so a later conditional branch can decide which instruction executes next.

In this supplied model, CMP operand compares unsigned ACC with the operand value and sets a comparison result to less, equal or greater. It leaves ACC unchanged. BEQ label branches if the most recent comparison was equal; BNE label branches if it was not equal. BLT label and BGT label branch if it was less or greater. A conditional branch that is not taken proceeds to the next line. BRA label branches unconditionally. Other operations in this model do not change the comparison result, so use an explicit CMP to test a new value.

For example, the following stores the greater of M[A] and M[B] in M[MAX]:

       LOAD A
       CMP B
       BGT SAVE
       LOAD B
SAVE:  STORE MAX
       HALT

If A is 9 and B is 4, the branch goes directly to SAVE with ACC = 9. If A is 2 and B is 4, the branch is not taken, so LOAD B makes ACC = 4. Equality follows the second path, but either equal value is a valid maximum. CMP does not subtract B permanently from ACC.

A backward branch forms a loop. This loop counts down from 3 to 0:

       LOAD #3
AGAIN: SUB #1
       CMP #0
       BNE AGAIN
       STORE COUNT
       HALT

After the first subtraction ACC = 2, the comparison is not equal, so the branch is taken. It repeats with 1 and then 0. At 0 the branch falls through and stores 0. Moving CMP above SUB changes which value is tested; omitting CMP leaves the branch using a stale comparison. A branch target must refer to the intended instruction, not merely a nearby label.