4.7.1.1, 4.7.2.1 - Internal hardware and the stored-program concept

Components and buses

The processor, memory and devices must exchange information in a controlled way for a program to do useful work.

The processor executes machine-code instructions: it performs arithmetic and logical operations and coordinates transfers. Main memory holds instructions and data that the processor can access directly. RAM normally holds the program currently running, its inputs and intermediate results; its contents are lost when power is removed. ROM can hold persistent instructions such as firmware. Secondary storage retains files long term, but a program on a disk normally needs loading into main memory before it runs.

An I/O controller is the interface between a peripheral and the computer's internal communication system. It provides control/status registers and buffering, translates signals or formats, and handles the device's timing. A keyboard and a printer work at very different speeds from the processor; the controller lets the processor request or receive data without having to generate every device signal itself.

Three logically distinct buses divide the jobs. The address bus selects a location in memory or an I/O controller. In this basic model its signals travel from the processor to the selected component. The data bus carries the actual instruction or data; it is bidirectional because the processor both reads and writes. The control bus carries commands and coordination signals, such as read, write and interrupt request. Its different signals may travel in different directions.

For a memory read, the processor places the required address on the address bus and asserts a read signal on the control bus. Memory decodes the address and places that location's contents on the data bus for the processor to receive. For a write, the processor supplies both the destination address and new data, then asserts write. An address specifies where; a data value specifies what; a control signal specifies which action and when.

Addressable memory

Memory is addressable when a unique address identifies each location the processor can select.

A location stores a fixed amount of information in the machine model. Byte-addressable memory gives each byte its own address; word-addressable memory gives each word its own address. A word may contain several bytes, so the same number of addresses need not mean the same byte capacity. State the size of a location before calculating capacity.

With an unsigned $n$-bit address, there are $2^n$ possible bit patterns, selecting addresses from $0$ to $2^n-1$. The address bus width limits the number of locations directly selectable by that bus; it does not say how much physical memory is installed.

For example, a 12-bit address bus selects $2^{12}=4096$ locations. If each location is one byte, that is 4096 bytes, or 4 KiB. If each location is a two-byte word, it is 8192 bytes, or 8 KiB. The greatest address is 4095 in both models. The data bus width is a different property: it determines how many bits can be carried in a transfer, rather than how many locations can be named.

Von Neumann and Harvard organisation

The organisation of instruction and data memory determines which transfers can share a path.

In von Neumann architecture, instructions and data occupy the same memory and use shared paths between memory and processor. A memory location's bit pattern is not inherently labelled as an instruction or a number: its use depends on the program and the operation performed. General-purpose computing systems use von Neumann organisation extensively because a common memory space is flexible.

In Harvard architecture, instruction memory and data memory are separate and have separate communication paths. A processor can fetch an instruction while accessing data using the other path, rather than both competing for a single path. The memories can also have different widths or technologies. Harvard processors are widely used in embedded systems, including digital signal processing systems where a continuous stream of data must be processed.

[DIAGRAM: asset_slug: architecture_paths; description: Von Neumann shares instruction and data memory while Harvard separates the two memories and their paths]

The arrows represent communication paths, including an address going out and information coming back; they are not individual wires. The useful comparison is separate memory and paths versus shared memory and paths. A real general-purpose processor may combine features, for example separate instruction and data caches with shared main memory; the two basic models remain useful without claiming every real machine is pure.

The stored-program concept

A stored program makes instructions part of the information the computer can hold and fetch.

The program's machine-code instructions are stored in main memory. The processor repeatedly fetches an instruction, interprets it and executes it, performing the specified arithmetic, logic or transfer. In the basic serial model it executes one instruction after another. A branch can change which instruction is fetched next, so serial execution does not mean always moving through every address in numerical order.

Suppose main memory contains instructions that read two values, add them and store the result. The processor does not need rewiring to perform subtraction instead: a different stored instruction sequence can request that operation. The stored-program idea concerns instructions held in memory and fetched for execution; simply having data in RAM, or saving a file on a disk, is not a sufficient description.

The memory organisation and the execution idea answer different questions. Harvard separates instruction memory from data memory, but its instructions can still be stored and fetched by a processor. The next lesson follows these transfers inside the processor's registers.