4.7.3.5 - Machine-code and assembly operations (C#)

Loads, stores and arithmetic

An assembly instruction is a readable mnemonic for an operation that the processor performs on data and state.

In this lesson's original supplied model, the accumulator ACC is an eight-bit register holding an unsigned value 0–255. Memory has numbered byte locations. M[40] means the byte stored at address 40, not the number 40 itself. ACC initially contains 0. Instruction labels identify branch targets; they are distinct from data addresses. Instructions execute in order unless a branch changes the next instruction.

These definitions belong to this supplied teaching model. In an examination, use the actual table and word width given; mnemonic spelling and overflow behaviour are not universal across processors.

Immediate addressing supplies the value in the instruction; direct addressing supplies its memory address. Thus ADD #40 adds forty, while ADD 40 adds the contents of location 40. A store needs a destination address, so STA #40 is not an instruction in this model.

Arithmetic retains the low eight bits: results wrap modulo 256. For example, 250 + 10 becomes 4; 2 − 5 becomes 253. This is the specified model's rule, not a claim that every exam question uses this word width or signed interpretation. Stores overwrite the destination's old value and leave other memory locations untouched.

With M[40] = 12 and M[41] = 7, trace this program one instruction at a time:

LDA 40
ADD 41
SUB #3
STA 42
HALT

ACC takes values 12, 19, 16, 16; M[42] becomes 16. Loading 40 would be wrong because LDA 40 uses direct addressing. The final HALT stops execution rather than clearing ACC.

Comparisons, branches and loops

A comparison records a relationship so that a later conditional branch can choose the next instruction.

For this model, CMP #n compares ACC with n and CMP a compares ACC with M[a], treating both as unsigned bytes. CMP leaves ACC unchanged and sets exactly one comparison state: less, equal or greater. Comparison state persists until another CMP; the other instructions do not change it. No conditional branch is used before a comparison.

If the conditional branch is not taken, continue with the next instruction. CMP does not subtract a value from ACC. A branch targets the labelled instruction, not the instruction after it. These distinctions prevent common trace errors.

This original program stores 1 at address 60 when M[50] is below 10, and stores 0 otherwise:

LDA 50
CMP #10
BLT SMALL
LDA #0
BRA SAVE
SMALL: LDA #1
SAVE: STA 60
HALT

For M[50] = 8, BLT is taken and 1 is stored. For 10, the comparison is equal, BLT is not taken and 0 is stored. BRA skips the SMALL assignment after the non-small case; without it both paths would store 1.

A loop uses a backward branch and must make progress towards a stopping condition. This countdown decreases M[40] from 3 to 0:

LDA #3
STA 40
AGAIN: LDA 40
SUB #1
STA 40
CMP #0
BGT AGAIN
HALT

The stored values after each pass are 2, 1, 0. CMP sees greater, greater, equal, so BGT is taken twice. HALT then stops with ACC = 0. If the program started the loop at 0, subtraction would wrap to 255; a loop with guaranteed positive starting input and a loop required to handle zero need different entry conditions.

Logical and shift operations

Bitwise instructions apply a rule independently to corresponding bits, while logical shifts move bits and fill vacated positions with zero.

AND produces 1 only if both bits are 1. OR produces 1 if at least one is 1. XOR produces 1 if exactly one is 1. NOT reverses each bit. The table shows each binary operator for one position: